Computing devices oftentimes use timers as a fundamental processing tool. For example, a timer can be used to measure how long it takes a task to complete processing, interrupt a task that is blocked after a pre-determined amount of time (e.g. a timeout timer), wake up process(es), and so forth. As computing devices (and the applications they run) become more and more complex, the usage of timers typically increases. One way to handle a multitude of timers running on a system efficiently is through the use of a timer wheel.
Among other things, a timer wheel groups timers into different time slots to be processed collectively. Sometimes when timers are added and removed to time slot(s), a global lock on the timer can be used to as a way to regulate the state of the timer wheel. When the timer wheel advances to a particular time slot on the wheel, the timers in that associated time slot are serviced. For example, at the start of each time slot, the timer wheel algorithms wake up, look for any associated timers contained within the associated time slot, potentially service at least some timers located in the time slot, and then block and/or wait for the start of the next time slot. This process can repeat itself indefinitely until the timer wheel is deleted and/or removed. The process of the timer wheel continuously waking up and checking for any timers in need of servicing, utilizes a central processing unit's (CPU) time and/or processing power, regardless of whether timers in need of service exist in and of the timer wheel's associated time slots. This, in turn, can affect the battery life of an associated computing device. When the timer wheel contains timers, these resources are directed towards active applications and/or processing. However, when the timer wheel is void of any timers, the repetitive nature of waking up each time slot and checking for non-existent timers can unnecessarily drain these resources. Further, using a global lock on a timer wheel with multiple timers can sometimes introduce a bottleneck and/or slowdown in performance due to delayed acquisition of the global lock.